#define SCLPORT PORTB
#define SCLDDR DDRB
#define SDAPORT PORTB
#define SDADDR DDRB
#define SDAPIN PINB
#define SCLPIN PINB
#define SCL PB1
#define SDA PB2
SCL and SDA signal edges:
#define TWI_SDA_LOW SDADDR |= (1 << SDA)
#define TWI_SDA_HIGH SDADDR &= ~(1 << SDA)
#define TWI_SCL_LOW SCLDDR |= (1 << SCL)
#define TWI_SCL_HIGH SCLDDR &= ~(1 << SCL)
24LC512 commands, ACK/NACK (acknowledge) and delays definitions:
#define _24LC512_WRITE 0b10100000
#define _24LC512_READ 0b10100001
#define ACK_ACK 1
#define ACK_NACK 0
#define Q_DEL _delay_loop_2(3);
#define H_DEL _delay_loop_2(5);
TWI/I2C commands (Init/Start/Stop/Write/Read):
void TWI_Init (void) {
SDAPORT &= ~(1 << SDA);
SCLPORT &= ~(1 << SCL);
TWI_SDA_HIGH;
TWI_SCL_HIGH;
}
void TWI_Start (void) {
TWI_SCL_HIGH;
H_DEL;
TWI_SDA_LOW;
H_DEL;
}
void TWI_Stop (void) {
TWI_SDA_LOW;
H_DEL;
TWI_SCL_HIGH;
Q_DEL;
TWI_SDA_HIGH;
H_DEL;
}
uint8_t TWI_Write (uint8_t Data) {
uint8_t i;
uint8_t ACK;
for (i = 0; i < 8; i++) {
TWI_SCL_LOW;
Q_DEL;
if (Data & 0x80) {
TWI_SDA_HIGH;
}
else {
TWI_SDA_LOW;
}
H_DEL;
TWI_SCL_HIGH;
H_DEL;
while ((SCLPIN & (1 << SCL)) == 0);
Data = Data << 1;
}
TWI_SCL_LOW;
Q_DEL;
TWI_SDA_HIGH;
H_DEL;
TWI_SCL_HIGH;
H_DEL;
ACK = !(SDAPIN & (1 << SDA));
TWI_SCL_LOW;
H_DEL;
return ACK;
}
uint8_t TWI_Read (uint8_t ACK) {
uint8_t Data = 0x00;
uint8_t i;
for (i = 0; i < 8; i++) {
TWI_SCL_LOW;
H_DEL;
TWI_SCL_HIGH;
H_DEL;
while ((SCLPIN & (1 << SCL)) == 0);
if (SDAPIN & (1 << SDA)) {
Data |= (0x80 >> i);
}
}
TWI_SCL_LOW;
Q_DEL;
if (ACK) {
TWI_SDA_LOW;
}
else {
TWI_SDA_HIGH;
}
H_DEL;
TWI_SCL_HIGH;
H_DEL;
TWI_SCL_LOW;
H_DEL;
TWI_SDA_HIGH;
return Data;
}
Finally, functions for accessing 24LC512 EEPROM:
uint8_t _24LC512_WriteByte (uint16_t Address, uint8_t Data) {
TWI_Start();
if (!TWI_Write(_24LC512_WRITE)) {
TWI_Stop();
return FALSE;
}
if (!TWI_Write(Address >> 8)) {
TWI_Stop();
return FALSE;
}
if (!TWI_Write(Address)) {
TWI_Stop();
return FALSE;
}
if (!TWI_Write(Data)) {
TWI_Stop();
return FALSE;
}
TWI_Stop();
_delay_ms(5);
return TRUE;
}
uint8_t _24LC512_WritePage (uint16_t Address, uint8_t* Page, uint8_t Count) {
TWI_Start();
if (!TWI_Write(_24LC512_WRITE)) {
TWI_Stop();
return FALSE;
}
if (!TWI_Write(Address >> 8)) {
TWI_Stop();
return FALSE;
}
if (!TWI_Write(Address)) {
TWI_Stop();
return FALSE;
}
while (Count--) {
if (!TWI_Write(*Page++)) {
TWI_Stop();
return FALSE;
}
}
TWI_Stop();
_delay_ms(5);
return TRUE;
}
uint8_t _24LC512_ReadByte (uint16_t Address, uint8_t* Data) {
TWI_Start();
if (!TWI_Write(_24LC512_WRITE)) {
TWI_Stop();
return FALSE;
}
if (!TWI_Write(Address >> 8)) {
TWI_Stop();
return FALSE;
}
if (!TWI_Write(Address)) {
TWI_Stop();
return FALSE;
}
TWI_Start();
if (!TWI_Write(_24LC512_READ)) {
TWI_Stop();
return FALSE;
}
*Data = TWI_Read(ACK_NACK);
TWI_Stop();
return TRUE;
}
uint8_t _24LC512_ReadPage (uint16_t Address, uint8_t* Page, uint8_t Count) {
TWI_Start();
if (!TWI_Write(_24LC512_WRITE)) {
TWI_Stop();
return FALSE;
}
if (!TWI_Write(Address >> 8)) {
TWI_Stop();
return FALSE;
}
if (!TWI_Write(Address)) {
TWI_Stop();
return FALSE;
}
TWI_Start();
if (!TWI_Write(_24LC512_READ)) {
TWI_Stop();
return FALSE;
}
Count--;
while (Count--) {
*Page++ = TWI_Read(ACK_ACK);
}
*Page++ = TWI_Read(ACK_NACK);
TWI_Stop();
return TRUE;
}
That's it, very simple.
Command
|
Value
|
Description
|
| ACCESS |
0
|
Accesses Keyring
using master password. Authentication should be done using this
command prior to performing any other actions, otherwise FAIL
status will be returned for every action. Session is initially set by this command and should be used for further interaction by UI. Request: [Command][Session][Master password] Reply: [Command][Status] |
| LIST |
1
|
Returns the list
of record statuses chunk-by-chunk – returns the specified chunk
of statuses. Request: [Command][Session][Chunk number] Reply: [Command][Status][Chunk list] |
| READ |
2
|
Reads record data.
Full reading should be done in two steps: first reply contains
description, the second one contains password. Request: [Command][Session][Number] Reply: [Command][Status][Description] – after the first request [Command][Status][Password] – after the second request |
| WRITE |
3
|
Writes data to the
specified record. Request: [Command][Session][Number][Description][Password] Reply: [Command][Status] |
| DELETE |
4
|
Deletes specified
record. Request: [Command][Session][Number] Reply: [Command][Status] |
| MASTER |
5
|
Changes master
password. Device should not be disconnected/powered off during
this operation, otherwise data integrity is not guaranteed. Request: [Command][Session][New master password] Reply: [Command][Status] |
| FORMAT |
6
|
Formats Keyring –
clears data and resets master password to default –
“OWLSANKEYRING”. Request: [Command][Session] Reply: [Command][Status] |
| FLUSH |
7
|
Flushes number
flag for READ command – service command. Request: [Command][Session] Reply: [Command][Status] |
| RESET |
8
|
Resets Keyring –
clears access flag and session (sign out analogue). Request: [Command][Session] Reply: [Command][Status] |
| PROGRAM |
9
|
Sets programming
flag, device enters DFU bootloader after the next reset. Request: [Command][Session] Reply: [Command][Status] |
Status
|
Value
|
Description
|
| FAIL |
0
|
Command execution has failed |
| DONE |
1
|
Command performed successfully |
Variable
|
Size,
bytes
|
Description
|
| Command | 1 | Refer to table 1 for the list of available commands. |
| Session | 4 | Unique ID that should be assigned to the connection on every ACCESS command invocation. |
| Status | 1 | Refer to table 2 for the list of available statuses. |
| Number | 4 | Record number – number of pair description + password. |
| Description | 32 | Description (hint) for the password. |
| Password/Master password | 16 | – |
| Chunk number | 4 | Number of record list status chunk. |
| Chunk list | 32 | List of record statuses. Refer to table 4 for KIP record statuses details. |
Record
status
|
Value
|
Description
|
| FREE |
0
|
Record space is free |
| DATA |
1
|
Record space contains data |
| CORRUPTED |
2
|
Corrupted record space – cannot be verified |
Location
|
Offset,
bytes
|
Item
|
| Internal | 0 | Signature – “OWLSANKEYRING” (w/o quotes) |
| Internal | 128 | Master password CRC32 hash |
| Internal | 256 | Programming flag |
| External | 0 | CRC32 hash table – used in CRC32 calculations |
| External | 1024 | Records statuses list |
| External | 2048 | Records data |
 |
| Image 1 |
 |
| Image 2 |
Type
|
Component
|
Count
|
Price
per unit, $
|
Total
price, $
|
MCU
|
AT90USB162
|
1
|
5.04
|
5.04
|
EEPROM
|
24LC512
|
1
|
2.94
|
2.94
|
Quartz
|
HC-49/SMD
16 MHz
|
1
|
2.58
|
2.58
|
Capacitor
|
22 pF
|
2
|
0.02
|
0.04
|
Capacitor
|
100 nF
|
2
|
0.05
|
0.10
|
Capacitor
|
4.7 uF
|
2
|
0.05
|
0.10
|
Resistor
|
22 Ohm
|
2
|
0.01
|
0.02
|
Resistor
|
4.7
kOhm
|
2
|
0.01
|
0.02
|
Connector
|
USB-A
SMD
|
1
|
1.83
|
1.83
|
PCB
material
|
Glass
textolite
|
–
|
1.00
|
1.00
|
Enclosure
|
Plastic
box
|
1
|
2.00
|
2.00
|
15.67
|
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